1. Field of the Invention
The present invention relates generally to semiconductor manufacturing processes, and more particularly to techniques for improving the adhesion of a cap layer to an underlayer that includes methyl doped silicon oxide material that is vapor deposited.
2. Description of the Related Art
As semiconductor manufacturing technology produces devices that are faster and more efficient, both the density of conductive lines and the frequency of charges flowing on the conductive lines tend to increase. Because semiconductors rely on insulating (i.e. dielectric) layers to reduce capacitive coupling between the conductive lines, it has become increasingly important to have insulation that is able to accommodate both the higher operating frequencies and the shrinking distances between the lines.
FIG. 1A is a cross-sectional view illustrating the respective layers of a typical semiconductor structure 10. The semiconductor structure 10 is made up of several layers including a cap layer 12, a dielectric SiO.sub.2 layer 14, and a semiconductor substrate 16. The semiconductor substrate 16 typically supports a first metal layer 18 formed into a number of conductive traces 18a, 18b, 18c and 18d.
A second metal layer 22 including traces 22a and 22b may be provided over the cap layer 12. A number of conductive vias, such as conductive via 20, are provided through the dielectric SiO.sub.2 layer 14 and the cap layer 12, connecting the traces of metal layer 18 to traces of metal layer 22. For ease of illustration, only one conductive via 20 and six metal traces 18a-d and 22a-b are shown, but as is well known in the art, many more conductive vias and metal traces are used to provide appropriate connections in a semiconductor or integrated circuit device.
A first plurality of capacitive couplings 26 exist between the first metal layer 18 and the second metal layer 22. A second plurality of capacitive couplings 28 exist between the metal traces 18a-d. The purpose of the dielectric SiO.sub.2 layer 14 is to insulate the metal traces and to reduce capacitive couplings 26 and 28.
With higher line density and higher operating frequencies, the coupling capacitances 26 and 28 are increasing to the point that dielectric SiO.sub.2 layer 14 is a less than adequate insulator. Raising the operating frequency requires a reduction in both the first coupling capacitance 26 and the second coupling capacitance 28. Furthermore, increasing the densities of the metal traces 18a-d decreases the distance d.sub.1 between each of the metal traces 18a-d which further increases the second capacitive coupling 28.
Another important dimension in FIG. 1A is the thickness t.sub.1 of the dielectric SiO.sub.2 layer 14. If the insulating material can be made thicker, the first coupling capacitance 26 can be reduced. Unfortunately, the dielectric SiO.sub.2 layer 14 may have only a maximum thickness t.sub.1 of about 3,000 Angstroms. If the dielectric layer thickness t.sub.1 exceeds 3,000 Angstroms, the dielectric SiO.sub.2 layer 14 will begin to crack and form rifts 30. Therefore, semiconductors need an alternative material that is both a better insulator (having a lower dielectric constant) and which resists cracking.
As illustrated in FIG. 1B, one way for improving the insulation of the semiconductor structure is to add methyl groups to the standard dielectric SiO.sub.2 layer 14 in FIG. 1A to produce a methyl doped silicon oxide layer 34. Adding methyl groups lowers the dielectric constant of the methyl doped silicon oxide layer 34 to about 2.8. The methyl groups, which are added with a solvent free operation allows a thickness t.sub.2 greater than 3,000 Angstroms (typically up to 10,000 Angstroms) without cracking.
Unfortunately, adding methyl groups to the dielectric layer can also cause the cap layer 12, which is added to protect the semiconductor structure, to peel away (as illustrated) during a subsequent chemical mechanical polishing (CMP) process used to planarize the cap layer. This is because the cap layer 12 doesn't adhere well to the methyl doped silicon oxide layer 34.
In view of the foregoing, it is desirable to have a method that provides for a low dielectric constant, low-cracking insulating material that adheres well to the cap layer all in the same semiconductor apparatus without adding significant time or cost to the process.